PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 184

2026-11-06 19:14 PST (2026-11-07T03:14:55Z UTC) · commit a86685a (a86685ae40fcf0e1a769b905738978ed68edf69b)

ADOPTED

ULPI_DIR connected: DRC-rule grid router (t_ab2) with NXT’s exit column (75.25,16.85-17.55) and mouth corridor (y-0.75, x68.5-70.8) reserved as virtual obstacles - DIR dives in its own column (75.875,17.375), B lobe run, REFCLK window via (67.25,29.625), western B/In2 journey, straight y-1.25 approach into U6.28. Audited delta: unconnected 21->20, violations 154 identical class table (zero new). NXT/STP remain: see tools commit for their named walls.

Nets fully routednot recorded
Pins failednot recorded
Clearance violations108
Unconnected nets17
Audit verdictFAIL

Routes — all copper layers and each layer

All layers
All layers — click the image to open the full-size SVG in a new tab.
All layersAll layers F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

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