PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 20

2026-11-04 06:35 PST (2026-11-04T14:35:37Z UTC) · commit c7ed6a2 (c7ed6a223224796ac7df97e12f157bdc9b700b89)

ADOPTED

cluster clearing at the U7 south row: 66 foreign items (the XI/XO/RBIAS/+VA fanout thicket) ripped in three process batches of <=25 removes (KiCad 7 SWIG corrupts beyond a few dozen removes per process); +3V3A U7.25/30/31 then connected in seconds each through the cleared field — +3V3A is down to its main group plus U9.5. Victim nets fragmented by the clearing (unconnected-net count rises to 38; +VA/XI/XO/RBIAS/ULPI stubs to be healed by repair in the cleared field). PHY_1V8 U7.26 and PHY_1V8A U7.29 still sealed with empty fanout even in the cleared field — a pad-geometry seal, not copper. APD_A is down to D1.4 alone; clearance unchanged at the 13 APD_K-vs-pour items

Nets fully routednot recorded
Pins failednot recorded
Clearance violations13
Unconnected nets38
Audit verdictFAIL

Routes — all copper layers and each layer

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 20 — top

Bottom

Pass 20 — bottom

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