PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 124

2026-11-05 16:12 PST (2026-11-06T00:12:25Z UTC) · commit 146a6ef (146a6ef734b761fdcfb9463198b220a9559cb834)

ADOPTED

Standing prune (owner’s instruction: after any route change) over pass 123’s heal copper: 6 dead 0.2mm segments removed (CAP_DATA, CDR_SQUELCH, I2C_SCL, HV_SHDN, VCAP2, PHY_1V8A), 6 tracks shortened (I2C_SDA, SET_P x2, ULPI_CK, VCAP1, HV_VC); partition proof passed for all nets (none moved, none reverted). DELTAS vs pass 123: nets 24->24, violations 71->71, census byte-identical. No victims.

Nets fully routednot recorded
Pins failednot recorded
Clearance violations71
Unconnected nets24
Audit verdictFAIL

Routes — all copper layers and each layer

All layers
All layers — click the image to open the full-size SVG in a new tab.
All layersAll layers F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

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