PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 29

2026-11-04 07:19 PST (2026-11-04T15:19:22Z UTC) · commit 30aa43d (30aa43d08fc16b172bc46439287e0cbe24c3f174)

ADOPTED

hand stub: ULPI_D3 U7.21 east along the row (openness test fixed — neck-width step instead of a fat cross; shorter 0.5 mm stubs admitted). Remaining sealed pads classified by blocker: fence tracks (rip+stub), C40’s pad (micro-move), D1 pair (custom via escapes)

Nets fully routednot recorded
Pins failednot recorded
Clearance violations13
Unconnected nets50
Audit verdictFAIL

Routes — all copper layers and each layer

F.Cu
F.Cu — click the image to open the full-size SVG in a new tab.
F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 29 — top

Bottom

Pass 29 — bottom

← Pass 28 · all passes · Pass 30 →