PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 26

2026-11-04 07:06 PST (2026-11-04T15:06:18Z UTC) · commit 8b9cb9d (8b9cb9d84ecd18163dc5f8d70eadc4cf7c995e4d)

ADOPTED

U10 cluster clearing (disc 16,10 r3.6): HV_FBX U10.2 connected; HV_GATE U10.7 and HV_SHDN U10.9 fanout-empty (sibling-pad seal)

Nets fully routednot recorded
Pins failednot recorded
Clearance violations13
Unconnected nets50
Audit verdictFAIL

Routes — all copper layers and each layer

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 26 — top

Bottom

Pass 26 — bottom

← Pass 25 · all passes · Pass 27 →