PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 143

2026-11-05 23:15 PST (2026-11-06T07:15:38Z UTC) · commit d28f43d (d28f43d7c9c28c70990cf18ba54bd3f93e999eb8)

ADOPTED

Heal-stub prune after the shorts campaign. Ran scratch/drc_graph_prune.py on exp172 (DRC proposes, contact graph vetoes bridges, DRC referees every round, unconnected invariant held at 45 in all 10 rounds run); stopped at the converged plateau (22 flagged residue = vetoed bridges + ambiguous hairline joints, the standing residue) and banked the last refereed state. KiCad DRC, exp172 -> exp173: violations 278 -> 268, track_dangling 27 -> 22, shorting_items 0, clearance 34, solder_mask_bridge 7, copper_edge_clearance 88 – all unchanged; unconnected items 45 UNCHANGED.

Nets fully routednot recorded
Pins failednot recorded
Clearance violations68
Unconnected nets31
Audit verdictFAIL

Routes — all copper layers and each layer

All layers
All layers — click the image to open the full-size SVG in a new tab.
All layersAll layers F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

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