PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 96

2026-11-05 04:38 PST (2026-11-05T12:38:20Z UTC) · commit 801534a (801534acd82f7f02cf1bc095e6beb777f9f870a9)

ADOPTED

Escapes 13 (exp53 -> exp54): APD_K In2 staircase repaired (5 segments re-placed exactly after batch 12 collateral rip), HV_FBX dive via restored at (10.12,-15.38); HV_RAW F continuation refused by the APD_K via (41.12,-4.38) – batches 14-16 take the north route instead. (exp55/exp56 were intra-batch waypoints of that route, folded into the next pass.)

Nets fully routednot recorded
Pins failednot recorded
Clearance violations78
Unconnected nets28
Audit verdictFAIL

Routes — all copper layers and each layer

All layers
All layers — click the image to open the full-size SVG in a new tab.
All layersAll layers F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 96 — top

Bottom

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