PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 5

2026-11-03 16:18 PST (2026-11-04T00:18:21Z UTC) · commit 162cc87 (162cc8762f15b8b432861d5dcaf89ba4ce13a7c0)

NOT ADOPTED

Repair pass over the pass-4 board — the first repair run to survive to a commit (attempts 1–3 were lost; see gaps). 82 isolated groups connected across 2 sweeps, but clearance violations rose 341 → 445, so it was NOT adopted as the main board; the board is kept as the attempt artifact. Its verdict drove the next rewrite: the router’s clearance model (grid-node + segment-midpoint tests) systematically under-protects against the audit’s exact shape geometry.

Nets fully routednot recorded
Pins failednot recorded
Clearance violations445
Unconnected nets95
Audit verdictFAIL

Routes — all copper layers and each layer

All layers
All layers — click the image to open the full-size SVG in a new tab.
All layersAll layers F.Cu layerF.CuIn1.Cu layerIn1.CuIn2.Cu layerIn2.CuB.Cu layerB.Cu

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 5 — top

Bottom

Pass 5 — bottom

Audit: results/audit-repair-attempt4.txt, committed with the pass (copper items 2,208). No renders were committed for this pass. Renders backfilled on 2026-11-04 by rendering the board file as of this pass's commit; not contemporaneous with the pass. Composite render backfilled on 2026-11-04 by rendering the board file as of this pass's commit; not contemporaneous with the pass.

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