PDLVDS-RX — photodiode LVDS receiver

Clean-room receiver for the Miniscope Zero optical uplink: Excelitas C30737LH Si APD → OPA657 TIA → LMH7220 comparator (LVDS out, DAC-set threshold) → ADN2813 CDR → STM32H723 + USB3300 USB-HS. Design target: 50 Mbps line rate, 8b/10b (40 Mbps payload); the paper's mode: 8 Mbps Manchester (16 Mbaud), as transmitted. LT3757 flyback APD bias 150–420 V. USB-C powered; verify on any laptop over USB, no FPGA attached.

Pass 144

2026-11-05 23:20 PST (2026-11-06T07:20:58Z UTC) · commit 17f6d2f (17f6d2fd3826b9955748566cdc0d1001cd5358b9)

ADOPTED

Copper-edge campaign, part 1: the creepage slot (x12..46 / y23.6..25.1, docs/02 HV-island creepage feature). Diagnosis: the class was not tracks hugging edges – several routes CROSS the slot outright (the heal-era router does respect the slot; the crossings were older copper) plus a fanout field inside its east tip. Ripped 5 nets in corridor (10,21)-(48,28) – HV_EN 29, DAC_VREF 12, +5V 12, HV_DAC 17, APD_K 1 – deleted 1 GND via inside the slot, healed all 5 (7 groups reconnected; APD_K test case first proved the re-lay keeps 0 segments within 0.5 mm of the slot). GND’s 8 segments inside/near the slot deleted surgically (pour carries the net; referee confirms no split). Pre-existing victims untouched by the corridor remain: RJ2.2, U7.4 (+5V leg), U6.97. KiCad DRC referee, exp173 -> exp174: violations 268 -> 253, copper_edge_clearance 88 -> 68, unconnected items 45 UNCHANGED, shorting 0, clearance 34, mask 7 unchanged, track_dangling 22 -> 25 (fresh heal stubs). Edge residue: J1 NPTH field at the south edge (18), slot east-tip fanout (10), east-edge x=100 runs (8+), south GND runs (6).

Nets fully routednot recorded
Pins failednot recorded
Clearance violations68
Unconnected nets32
Audit verdictFAIL

Routes — all copper layers and each layer

F.Cu In1.Cu In2.Cu B.Cu

Top

Pass 144 — top

Bottom

Pass 144 — bottom

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